This invention relates to the field of signal splitters for use in CATV distribution systems, and in other applications in which signals, having a wide range of frequencies, are distributed across various output ports. The invention is therefore not necessarily limited to use in CATV system.
At literally thousands of locations in a CATV (community antenna television) distribution system, an incoming signal must be split among two or more outgoing branch circuits. The signal splitters that divide the signal among the outgoing branches must fulfill several challenging performance criteria. First, the CATV signal has a very broad bandwidth, currently ranging from 5-552 MHz. In the foreseeable future, the upper limit will reach 1000 MHz (1 GHz), so the total bandwidth will approach eight octaves of range. At 1 GHz, conventional printed circuit boards and wire lead components do not perform acceptably.
Secondly, over the frequency range of the signal, the power loss must be uniform, within a small fraction of a decibel. During its trip from the head-end of the system to a subscriber's home, the signal must pass through more than a dozen splitters. Any attenuation in the splitter will be multiplied by the number of splitters in the line.
Thirdly, the splitters must have very good output return loss. This means that any signals flowing back from one of the output branch circuits should be absorbed by the splitter, and not reflected back down the branch circuit. Signals that are so reflected appear as "ghost" images on a subscriber's television set.
Fourthly, the splitters must have very good output isolation. This means that a signal entering or exiting one of the output ports should not appear at another output port. If a signal could travel from one output port to another, a neighbor's television reception would be degraded.
FIG. 1 shows a basic splitter circuit of the prior art. The circuit is of the type which produces equal outputs. It is also possible to provide a circuit with unequal outputs, but the latter circuit is outside the scope of the present invention. The circuit of FIG. 1 includes an input port and two output ports. Multiple output ports can be accommodated by constructing binary "trees" each comprising the basic circuit. That is, each output port of a given signal splitter circuit is connected to the input port of another identical splitter circuit. In this way, a plurality of splitter circuits are connected in a cascading arrangement, so that a single input signal can be split into an arbitrarily large number of output signals.
If both output ports are loaded with impedance Z.sub.o, then the currents induced by an input voltage at point B, flowing through windings N3 and N4 of T2, should be equal. If N3=N4, the magnetic fields induced in the core of T2 by these currents should be equal and opposite, and there is no net voltage between points C and D. The load at point B, as seen from the input port, is the parallel combination of the loads on the output ports A and B, or Z.sub.o /2. In order to provide correct impedance matching, T1 is used to transform the input impedance by a factor of 2. Hence, the ratio of turns N1+N2 to N2, of T1, should be (2).sup..5.
If reflected energy appears at output port A, it is absorbed by two impedances in series. The first one is the input source impedance Z.sub.o, transformed down by a factor of 2 by T1, resulting in a load of Z.sub.o /2. The second one is the load resistor R1, which is chosen to have impedance 2Z.sub.o, transformed down by T2 to Z.sub.o /2, according to the square of the turns ratio (N3+N4)/N3. These two impedances in series combine to form Z.sub.o exactly, for a perfect match.
In the case of reflected energy appearing at output port A, the two equal series load impedances result in a voltage at point B which is exactly one-half the magnitude, and the same phase, as the voltage at point C. It is assumed that the windings of T2 have equal numbers of turns, i.e. N3=N4. Then these windings set the voltage between points B and C to exactly one-half the voltage between points C and D. Thus, the voltage at point D is zero, implying that no energy reflected back into output port A will appear at output port B.
The design of a signal splitter capable of good performance over a broad frequency range presents substantial problems. While one can obtain load resistors which are nearly ideal over the range of 5-552 MHz, transformers T1 and T2 will exhibit significant deviations from the ideal. To first order, one can consider these deviations equivalent to adding impedances in series and in parallel to each transformer winding. The parallel impedance represents core magnetization current and losses in the transformer. Transformer core manufacturers specify the parallel impedance induced in a one-turn winding over the range of operating frequencies. This parallel impedance can be controlled within a 20% tolerance, which is quite acceptable for a second order effect.
The series impedance, on the other hand, poses a more difficult problem. The series impedance is largely due to leakage inductance resulting from the fact that all of the magnetic field induced by the current in each turn of every winding on a core does not pass through all of the other turns. The amount of leakage inductance is determined by both the core material and the physical layout of the windings. Transformer manufacturers do not specify such effects, and the windings are made by hand on very tiny cores. Thus, there is wide variation in the series impedance, frequently requiring adjustment in the final product by manual spreading of the turns.
Several techniques can be used to compensate for the equivalent parallel impedance introduced by T1 and T2. First, identical cores can be used for T1 and T2, and windings N2, N3, and N4 can all be set equal. In this case, the critical output isolation, between output ports A and B, will be maintained independent of the exact value of the parallel core losses.
Secondly, one can take advantage of the fact that the parallel core loss impedance of good wideband ferrite core material is almost perfectly resistive and fairly constant over most of its intended bandwidth. Thus, the value of the load resistor R1 can be increased and the input matching transformer ratio (N1+N2)/N2 can be decreased to compensate for the addition of this parallel resistance.
The above-described compensation technique can be extended to deal with the case where N2 is not chosen to be equal to N3 and N4. The primary limitation to such compensation arises from the more severe limitations imposed by performance degradation due to series leakage inductance.
Compensation for the equivalent series impedance introduced by leakage inductance in T1 and T2 is the single most important determinant of splitter performance. FIG. 2 shows a typical prior art circuit which attempts to compensate for leakage inductance. Since the leakage impedance is largely inductive, the classical solution was to add capacitors to ground so as to form, effectively, multiple LC transmission line half-sections with the distributed series inductance. The half-sections should have opposing orientations, and each should have a natural impedance equal to the circuit impedance at that point. This means that the impedance should be Z.sub.o =L.sub.s /C, where L.sub.s is the leakage inductance. The capacitance of C.sub.1 can be viewed as the sum of three capacitances in parallel, one capacitance forming a transmission line half section with the leakage inductance of T1, and the other two forming transmission line half sections with the leakage inductances of the two halves of T2. The capacitance of the output connectors to ground also forms a transmission line half section with a part of the series leakage inductances of T2.
A major practical limitation to transmission line leakage inductance compensation, at frequencies over 300-500 MHz is the lead inductance of C1. Frequently, C1 is implemented as several capacitors in parallel, to reduce this parasitic effect.
The prior art circuit of FIG. 2 compensates for the output isolation degradation due to the leakage inductance of T2 by adding inductors L1 and L2 in series with the load resistor R1. A signal originating at one output port flows through two parallel paths, one path passing through T2 and the other path passing through L1, L2 and R1, to reach the other output port. The signals in these paths are 180.degree. out of phase, due to the action of transformer T2. The magnitude of these signals are adjusted to be equal so that the signals therefore cancel. Thus, no signal originating at one of the output ports appears at the other output port.
However, the circuit of FIG. 2 has the disadvantage that when the high frequency attenuation is balanced in the two paths, the phase shift through transformer T2 is significantly greater than that of the path containing L1, L2, and R1. This effect limits the ability of the circuit to provide the desired signal isolation. This effect is due to the fact that one of the signal paths, namely the path through T2, contains two transmission line half-sections. These half-sections introduce the unwanted rapid phase shift.
The present invention provides a signal splitter which has all of the desirable characteristics outlined above, namely, satisfactory operation across a wide bandwidth, output isolation, and acceptable impedance matching, but which also easily compensates for leakage inductance in the transformer. The circuit of the present invention is also especially easy to realize using surface mount technology (SMT), which is the technique of choice when dealing with high frequency signals.